In recent years, to increase the processing speed of processors used in processing systems, processors using a pipeline system have been used. In the pipeline system, a processor has a plurality of pipelines (instruction control pipeline, processing pipeline, branch control pipeline, etc.) for realizing its functions. Each pipeline is divided into a plurality of stages. Each stage includes a circuit unit for realizing a predetermined process. It operates so as to end the predetermined process assigned to that stage within a time called as a “cycle time” comprised of the reciprocal of the operating frequency. Further, the output signal of the stage relating to the preceding process is, for example, used as an input signal of a stage relating to a succeeding process.
As one technique for increasing the processing speed of a processor using the pipeline system, a tag RAM (random access memory) and a cache memory operating so as to access a data RAM in 1 cycle have been proposed.    [Patent Document 1] Japanese Laid-open Patent Publication No. 2004-171177